China Just Exposed Intel's Best Chip — And Nobody Saw It Coming

By Quantum Silk Route

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#china #intel #chipwar A teardown of Huawei's Kirin 9030 found that SMIC's N+3 process hits a 32.5nm minimum metal pitch, tighter than the 36nm shipping in Intel's 18A Panther Lake chips. That number is real and independently measured. It also does not mean what almost every headline said it meant. Intel's 18A process supports roughly 32nm and simply shipped looser, and on overall transistor density SMIC still trails Intel by about 38 percent. This video breaks down the SemiAnalysis STEEL teardown, the DUV multi-patterning and DTCO tricks SMIC used to get there, and why the contradiction between those two numbers exposes a real weakness in how the semiconductor industry measures progress. Metal pitch, transistor density, and node names like 7nm, 5nm and 18A are not measuring the same thing, and this teardown is the clearest evidence yet of how far apart they have drifted. CHAPTERS 00:00 The 32.5nm result 00:35 How is that even possible without EUV 01:15 Who actually measured it 02:1

Tags: SMIC N+3, Kirin 9030, Intel 18A, SemiAnalysis teardown, metal pitch, transistor density, EUV lithography, DUV multi patterning, Huawei Mate 80, semiconductor export controls, TSMC N6, Panther Lake, chip teardown, SAQP, self aligned quadruple patterning, process node names, HiSilicon, China semiconductor, advanced packaging, DTCO